PCB Design Guide to Reducing EMI

PCB Design Guide to Reducing EMI

The PCB Design guidelines for reduced EMI, Contain information about : RF Sources, Surface-Mount Devices vs Through-Hole Components, Static Pins vs Active Pins vs Inputs, Basic Loops, Proportionality of Loops and Dipoles, Differential vs Common Mode, Board Layout. Grounds and Power 2.1.1 Inductance 2.1.2 Two-Layer vs Four-Layer Boards 2.1.3 Microcomputer Grounds in One- and Two-Layer Designs 2.1.4 Signal Return Grounds 2.1.5 Analog vs Digital vs High Power 2.1.6 Analog Power-Supply Pins and Analog Reference Voltages 2.1.7 Power Plane Do’s and Dont’s for Four-Layer Boards 2.2 Power Distribution for Two-Layer Boards 2.2.1 Single-Point vs Multipoint Distribution 2.2.2 Star Distribution 2.2.3 Gridding to Create Planes 2.2.4 Bypassing and Ferrite Beads 2.2.5 Keeping Noise Close to the Chip 2.3 Board Zoning 2.4 Signal Traces 2.4.1 Capacitive and Inductive Crosstalk 2.4.2 Antenna Factor Length Rules 2.4.3 Series Termination, Transmission Lines 2.4.4 Impedance Matching at Inputs 2.5 Cables and Connectors 2.5.1 Differential-Mode and Common-Mode Noise 2.5.2 Crosstalk Model 2.5.3 Number of Returns 2.5.4 I/O Recommendations for Off-PCB Signals 2.5.5 Keeping Noise and Electrostatic Discharge (ESD) Out 2.6 Other Layout Issues 2.6.1 Front-Panel PCB with Keypad and Display in Automotive and Consumer Applications 2.6.2 Layout for Susceptibility 2.6.3 Autorouters 3 Shielding 3.1 How It Works 3.2 Grounding the Shield 3.3 Cables and Bypassing to the Shield 3.4 Slot Antennas: Cooling Slots and Seams. This is critical to two-layer board design, where maximum effectiveness from noise-control components is needed. The biggest problem is noise from the integrated-circuit (IC) input/output (I/O) pins. Because the area covered by traces connected to them on the PCB form a large antenna. The only non-dc current that should flow in the power routing of the PCB is the current required to replenish the bypassing capacitor.


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